Contents of the CMSIS file structure:
- core_cm0.h : contains cortex-M0's global declarations & definitions as well as static function definitions.
- core_cm0.c : contains cortex-M0's global definitions.
- <device.h> [in this case: NUC1xx.h] : Top level device specific header file containing device specific bit definitions and structure/union definitions. This file includes core_cm0.h and system_NUC1xx.h files. This file should be included while writing application code.
- system_<device>.h [in this case system_NUC1xx.h] : This file contains device specific declarations.
- system_<device>.c [in this case system_NUC1xx.c] : This file contains device specific definitions like SystemCoreClockUpdate() and systemInit() calls.
Exploring the NUC1xx.h file :
- In this file, the parameter _MPU Present 0 indicates there is no memory protection unit while the other parameter __NVIC_PRIO_BITS 2 informs the user that there can be maximum 2 priority bits to set.
- The __Vendor_SysTickConfig defined parameter has the default setting as 0. When this macro is set to 1, the SysTickConfig() function in the core_cm0.h is excluded. If it is set to 1 then in that case file <device>.h [here NUC1xx.h] must contain a vendor [Nuvoton] specific implementation of this function.
Compiler support built into CMSIS: Currently three main compilers are supported by CMSIS namely, armgcc from ARM REAL view, iccarm from IAR EWARM and gcc from GNU compiler collection. All the functions in the core peripheral access layer are reentrant and can be called from different interrupt service routines. The exception handers are given a suffix __Handler while the external interrupt handlers are given a suffix __IRQHandler.
